1. Field of the Invention
The present invention relates to a transmission circuit usable for a communication apparatus, such as a mobile phone, a wireless LAN device or the like, and more specifically to a transmission circuit for alleviating the frequency characteristics of a group delay and an attenuation amount in a transmission signal band and also for expanding the dynamic range to a high frequency band, and a communication apparatus using the same.
2. Description of the Background Art
As a conventional transmission circuit for a mobile phone, a transmission circuit of a quadrature modulation system as shown in FIG. 9 is used. FIG. 9 is a block diagram showing an exemplary structure of a conventional transmission circuit of the quadrature modulation system. As shown in FIG. 9, the conventional transmission circuit of the quadrature modulation system includes D/A converters 101 and 104, low pass filters 102 and 105, mixers 103 and 106, a local oscillator 107, a phase shifter 108, an adder 109, an RF filter 110, an attenuator 111, a power amplifier 112, and an isolator 113.
I and Q signals which are input from a baseband circuit (not shown) are respectively input to the mixers 103 and 106 via the D/A converters 101 and 104 and the low pass filters 102 and 105. The signals which are input to the mixers 103 and 106 are mixed together by a signal divided by a phase frequency division circuit including the local oscillator 107 and the phase shifter 108 and then processed with quadrature modulation by the adder 109. An output signal from the adder 109 passes through the RF filter 110 for suppressing an unnecessary harmonic, is amplified by the power amplifier 112 via the attenuator 111, and then is output to an antenna duplexer (not shown) via the isolator 113 for suppressing the load fluctuation of the power amplifier 112.
Various communication systems are widely used in the world today, and a multi-mode wireless communication system compatible with a plurality of communication systems is desired. However, a multi-mode wireless communication terminal based on the conventional technology has an increased size due to a large number of components especially in a wireless section, and thus has a high cost. Therefore, being able to use one component for different purposes is an important issue in realizing a multi-mode wireless communication terminal.
In the EDGE (Enhanced Data GSMEnvironment) system, which was developed for the purpose of raising the communication speed based on GSM (Global System for Mobile Communications) and is one standard of the mobile phone, a polar modulation system is often used as a modulation system in a wireless transmission section for the following reasons. The polar modulation system has a high level of affinity with a transmission circuit structure of GMSK (Gaussian filtered Minimum Shift Keying) modulation, which is a conventional modulation system. By adopting a polar modulation system in a multi-mode wireless communication terminal compatible with the GSM system and UMTS (Universal Mobile Telecommunications System), the system is simplified because a single platform can be used.
With such a background, a transmission circuit of the polar modulation system has been proposed. FIG. 10 is a block diagram showing an exemplary structure of a conventional transmission circuit of a polar modulation system. As shown in FIG. 10, I and Q signals which are input from a baseband circuit (not shown) are separated into an amplitude signal and a phase signal by a CODEC 114. The amplitude signal is amplitude-modulated by an amplitude modulator 115 and is input to a voltage control circuit 118 via a D/A converter 116 and an attenuator 117. The voltage control circuit 118 outputs a signal which is preset in accordance with the magnitude of the amplitude signal to a power amplifier 119. The phase signal is input to a phase modulator 120. The phase modulator 120 performs phase modulation on the input phase signal and outputs the resultant signal as a phase modulated signal. The power amplifier 119 performs amplitude modulation on the phase modulated signal which is output from the phase modulator 120 with a signal which is output from the voltage control circuit 118, and outputs the resultant signal to an antenna duplexer (not shown) as an amplitude modulated signal.
As compared with the transmission circuit by the quadrature modulation system described above with reference to FIG. 9, the transmission circuit of the polar modulation system does not need an analog quadrature modulator and thus does not need the RF filter 110. In addition, the transmission circuit of the polar modulation system can reduce power consumption because the power amplifier 119 does not need to provide linearity. The transmission circuit using the polar modulation system does not need an isolator 113 either because the influence of the load fluctuation is alleviated.
Despite the above-described advantages, the transmission circuit of the polar modulation system has the problem that because the amplitude signal and the phase signal are separate, the transmission circuit cannot provide functions thereof sufficiently if the amplitude signal and the phase signal are different in group delay, even though the amplitude signal and the phase signal are synthesized by the power amplifier 119.
One exemplary circuit for reducing the group delay included in a high frequency signal is, for example, a group delay compensation circuit disclosed in Japanese Laid-Open Patent Publication No. 2001-53631 (hereinafter, referred to as “patent document 1”). FIG. 11 is a block diagram showing an exemplary structure of a conventional group delay compensation circuit 122 disclosed in patent document 1. As shown in FIG. 11, the conventional group delay compensation circuit 122 includes a fixed delay device 123, a variable phase device 124, a variable attenuator 125, a frequency displacement detector 126, and a signal converter 127. The fixed delay device 123 outputs a high frequency signal which passed through an analog filer 121 with a delay of a certain length of time. The frequency displacement detector 126 detects a displacement amount, from the central frequency, of the high frequency signal which passed through the analog signal 121. The signal converter 127 generates a control signal for controlling the delay amount of the variable phase device 124 and a control signal for controlling the amplitude level of the variable attenuator 125, based on the displacement amount detected by the frequency displacement detector 126. The variable phase device 124 controls the phase of the output signal from the fixed delay device 123 by the control signal. The variable attenuator 125 controls the amplitude of the output signal from the variable phase device 124 by the control signal.
As described above, in the conventional group delay compensation circuit 122, the signal converter 127 controls the phase amount of the variable phase device 124 such that the delay time in the transfer signal band is flattened based on the displacement amount detected by the frequency displacement detector 126. Namely, the conventional group delay compensation circuit 122 matches the delay time at and around the cut-off frequency on the low frequency side, the delay time at and around the central frequency, and the delay time at and around the cut-off frequency on the high frequency side, by controlling the phase amount of the variable phase device 124. As a result, the high frequency signal which passed through the analog filter 121 is output as a signal having the group delay deviation flattened by the group delay compensation circuit 122 although the overall delay amount is increased.
As an exemplary structure of a conventional variable attenuator 125, a structure of a 4-bit variable attenuator 130 using resistor elements will be shown. FIG. 12 shows an exemplary structure of the conventional 4-bit variable attenuator 130. As shown in FIG. 12, the 4-bit variable attenuator 130 includes an input terminal 131, an output terminal 132, switching elements 133 through 136, 2R resistor elements 137 through 141, and R resistor elements 142 through 144.
The 2R resistor elements 137 through 141 each have a resistance value twice as high as that of each of the R resistor elements 142 through 144. Therefore, a 2R resistor element may have a structure of two R resistor elements connected in series. Control terminals D1 through D4 of the switching elements 133 through 136 are connected to a transistor-transistor logic (TTL) circuit (not shown) and perform ON/OFF switching operations in accordance with a control signal (binary data) which is output from the TTL circuit.
Specifically, the 4-bit variable attenuator 130 of a ladder type as shown in FIG. 12 has the following connection structure. In the 4-bit variable attenuator 130, the switching element 133 and the 2R resistor element 138 are connected in series, the switching element 134 and the 2R resistor element 139 are connected in series, the switching element 135 and the 2R resistor element 140 are connected in series, and the switching element 136 and the 2R resistor element 141 are connected in series. The switching elements 133 through 136 are each connected to the input terminal 131. One output of the 2R resistor element 138 is grounded via the 2R resistor element 137, and other output of the 2R resistor element 138 is connected to the 2R resistor element 139 via the R resistor element 142. The 2R resistor element 139 is connected to the 2R resistor element 140 via the R resistor element 143. The 2R resistor element 140 is connected to the 2R resistor element 141 via the R resistor element 144. The connection point between the 2R resistor element 141 and the R resistor element 144 is connected to the output terminal 132.
The attenuation amount which is set for the 4-bit variable attenuator 130 having the ladder structure shown in FIG. 12 is represented by expression (1) .Attenuation amount dB=20 log(control signal/24)  expression (1)
where 0≦control signal≦24−1
When the control signal is 3, the binary thereof is “0011”, and the value of “0” or “1” at each level represents the state of D4, D3, D2 or D1. Namely, at “0”, the switching element is controlled to be grounded; and at “1”, the switching element is controlled to be connected to the input terminal 131 of the 4-bit variable attenuator 130. By switching the four switching elements 133 through 136 to ON or OFF in this manner, the 4-bit variable attenuator 130 can output a signal shaped by an attenuation amount of one of 16 stages of “0000” through “1111” from the output terminal 132.
However, the conventional 4-bit variable attenuator 103 shown in FIG. 12 has the following problem. When the switching elements 133 through 136 are each formed of, for example, a MOS transistor, unless the ON resistance value of the MOS transistor is sufficiently smaller than the resistance value of the 2R resistor elements 137 through 141 and the R resistor elements 142 through 144, the output signal is distorted.
The 2R resistor elements 137 through 141 and the R resistor elements 142 through 144 do not have a frequency characteristic. However, when the switching elements 133 through 136 are each formed of, for example, a MOS transistor, the switching elements 133 through 136 are influenced by the parasitic capacitance of the MOS transistor and the frequency characteristics thereof are deteriorated.
With reference to FIG. 13, the influence of the parasitic capacitance of a switching element in a conventional variable attenuator will be described. FIG. 13 shows operation simulation results of a conventional 8-bit variable attenuator. Although not shown, the 8-bit variable attenuator may include 10 switching elements, 11 2R resistor elements, and 9 R resistor elements based on the structure of the 4-bit variable attenuator 130 shown in FIG. 12. Namely, the attenuation amount of the 8-bit variable attenuator can be controlled to be any one of 256 stages by a transmission power control signal.
In FIG. 13, (a) shows the phase characteristics, (b) shows the gain characteristics, and (c) shows the group delay characteristics. It is understood that by the influence of the parasitic capacitance of the switching elements, the group delay deviation is −2.4 nsec. at the maximum when the transmission power control signal=1, is 1.4 nsec. at the maximum when the transmission power control signal=3, and is 0.3 nsec. at the maximum when the transmission power control signal=255.
As the transmission power control signal is increased, i.e., as the number of the resistor elements is increased, the influence of the parasitic capacitance of the switching elements becomes conspicuous. As the transmission power control signal is increased, i.e., as the number of the resistor elements is increased, it becomes difficult for the gain characteristics to be kept flat to the high frequency area.